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Ordering number : ENA0989
Bi-CMOS IC
LV4920H
Overview
Class-D Audio Power Amplifier
Power Cell BTL 15Wx2CH, 10Wx2CH
The LV4920H is a 2-channel BTL full-bridge driver for digital power amplifiers. It requires a PWM modulator IC in the previous stage. This IC is a power cell that takes in PWM signals as an input and is used to form a digital amplifier system for TVs, amusement equipment, and other such systems.
Application
* TV sets (PDP/LCD) * Amusement equipment (pinball or pinball-slot-machines) * Home audio equipment (mini-/micro-audio systems) * Home theater equipment
Features
* BTL output, class D amplifier system * High-efficiency class D amplifier * Muting function reduces impulse noise at power on/off * Full complement of built-in protection circuits: overcurrent protection, thermal protection, and low power supply voltage protection circuits * Built-in bootstrap diodes
Specification
* Output 1=10W/ch, THD+N=10%, 8 Load, 1kHz, AES17, VD=13V * Output 2=15W/ch, THD+N=10%, 8 Load, 1kHz, AES17, VD=16V * High efficiency 85% or larger (Condition: 8 Load) * THD+N<0.1% 1W/1kHz/8 Load (Filter: AES17) * Package: HSOP36
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment.
D0507 TI IM 20071022-S00006 No.A0989-1/12
LV4920H
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Maximum output current Maximum pull-up pin voltage Allowable power dissipation Maximum junction temperature Operating temperature Storage temperature Package thermal resistance Symbol VD max IO peak Vpup max Pd max Tj max Topr Tstg jc -25 -50 Conditions min Externally applied voltage Per channel Nch open drain terminal 16 pin, 17 pin applied voltage Mounted on a specified board* Ratings typ max 24 6 20 3.95 +150 +75 +150 2.5 V A/ch V W C C C C/W Unit
* Mounted on a specified board: 80.0mmx63.0mmx1.5mm, glass epoxy (two-layer). Recommended Operating Condtions at Ta = 25C
Parameter Recommended supply voltage Recommended pull-up supply voltage Recommended load resistance Symbol VD Vpup RL Conditions min Externally applied voltage Nch open drain supply voltage Speaker load 4 8 Ratings typ 13 16 8 max 20 18 V V Unit
Electrical Characteristics at Ta = 25C, VD = 13V, LC less filter and no load
Parameter Quiescent current Standby current H input voltage L input voltage H input current L input current Output pin leakage current Output pin current Power Tr ON resistance *2 Turn ON delay time Turn OFF delay time Rise-up time Fall time Minimum output pulse range Symbol ICCO Ist VIH VIL IIH IIL IOFF IOL RdsON td ON td OFF tr tf VOPW MUTEB=L STBYB=L PWM_A, PWM_B MUTEB, STBYB PWM_A, PWM_B STBYB, MUTEB VIN=5.0V VIN=0V Nch open drain output OFF-stage 5.0V pull-up Nch open drain output ON-stage, VOL=0.4V ID=1A fin=384kHz fin=384kHz fin=384kHz fin=384kHz 100 300 40 40 20 20 70 70 40 40 m ns ns ns ns ns 0.15 mA -10 1 20 A A A 0 1.0 V 2.5 Conditions min Ratings typ 1.0 max 3.0 1 5.5 mA A V Unit
*2: Design guaranteed maximum ON resistance of power Tr (RdsON): 360m.
No.A0989-2/12
LV4920H
Electrical Characteristics / Operating Conditions (Reference values) Ta = 25C, VD = 13V, RL = 8, filter: 20kHz AES17 Given below are reference characteristic values of a digital amplifier system shown in the recommended application circuit (on page 10) in which the SANYO reference model of PWM modulator (BD-mode) is used.
Parameter Output 1 Output 2 Total harmonic distortion Output Noise SN-ration Dynamic range Symbol Po1 Po2 THD+N@1W Vno S/N DNR Conditions min THD+N=10% VD=16V, THD+N=10% Po=1W Ratings typ 10 15 0.1 50 100 100 max W W % Vrms dB dB Unit
Note: The values of these characteristics were measured in SANYO test environment. The actual values in an end system will vary depending on the printed circuit board pattern, the external components actually used, and other factors.
Package Dimensions
unit : mm (typ) 3235A
17.8 (6.2) 2.7 36
(4.9)
0.65 0.25 0.3
1 (0.5) (2.25) 0.8 2.0
2.45max
0.1
SANYO : HSOP36(375mil)
Test Circuit and Block Diagram
10.5
7.9
PWM BD-mode MCLK PWM_A1
BCLK Audio data I2S LRCLK PWM Modulator
PWM_B1 LV4920H PWM_B2 PWM_A2
SDATA
No.A0989-3/12
LV4920H
Block Diagram
LV4920H
STBY 1 NC1 2 3 MUTE 3 NC2 4 4 PWM_A1 5 NC3 6 4
PWM_RECEIVER CONTROL DELAY OUTPUTSTAGE CH1PWM_RECEIVER OUTPUTSTAGE CH1+
36 PVD1 35 PVD1 34 OUT_CH1_P 33 BOOT_CH1_P 32 VDDA1 31 BOOT_CH1_N 30 OUT_CH1_N 29 PGND1
THERMAL
4 PWM_B1 7 NC4 8 4 4 VREG5 9
28 PGND1
POWER SUPPLY
SEQUENCE
4 GND 10 4 NC5 11 4 PWM_B2 12
PWM_RECEIVER
OVER CURRENT
27 PGND2 26 PGND2 25 OUT_CH2_N
4 NC6 13 4 PWM_A2 14 4 NC7 15
PWM_RECEIVER CONTROL DELAY
OUTPUTSTAGE CH2-
24 BOOT_CH2_N 23 VDDA2 22 BOOT_CH2_P
4 NOD_THERM 16 4 NOD_OUTSHDN 17 4 NC8 18
OUTPUTSTAGE CH2+
21 OUT_CH2_P 20 PVD2 19 PVD2
No.A0989-4/12
LV4920H
Pin Functions
Pin No 1 STBY Pin name I/O I Pin explanation Standby mode control Internal equivalent circuit
2 3
NC1 MUTE
I
Non connection Muting control
VD
VDDA
3
10k
GND
4 5 NC2 PWM_A1 I Non connection PWM input (plus input) of OUT_CH1_P
6 7
NC3 PWM_B1
I
Non connection PWM input (negative input) of OUT_CH1_N
8 9
NC4 VREG5
O
Non connection Smoothing capacitor connection pin for internal 5V power supply.
Continued on next page.
500k No.A0989-5/12
500k
LV4920H
Continued from preceding page.
Pin No 10 11 12 GND NC5 PWM_B2 Pin name I/O I Pin explanation Analog ground Non connection PWM input (negative input) of OUT_CH2_N Internal equivalent circuit
13 14
NC6 PWM_A2
I
Non connection PWM input (plus input) of OUT_CH2_P
15 16
NC7 NOD_THERM
O
Non connection Thermal detector circuit for output (N-ch open drain)
17
NOD_OUTSHDN
O
Output shutdown monitor output (N-ch open drain) (when thermal protection circuit is activated, when low power supply voltage protection circuit is activated, or when in mute mode)
18 19 20 21
NC8 PVD2 PVD2 OUT_CH2_P
O
Non connection Channel 2 power system power supply Channel 2 power system power supply Channel 2 high side output
500k Continued on next page.
No.A0989-6/12
LV4920H
Continued from preceding page.
Pin No 22 23 24 25 Pin name BOOT_CH2_P VDDA2 BOOT_CH2_N OUT_CH2_N I/O I/O O I/O O Pin explanation Bootstrap I/O pin, channel 2 power supply high side Internal power supply decoupling capacitor connection Bootstrap I/O pin, channel 2 power supply low side Channel 2 low side output Internal equivalent circuit
26 27 28 29 30
PGND2 PGND2 PGND1 PGND1 OUT_CH1_N
O
Channel 2 power system ground Channel 2 power system ground Channel 1 power system ground Channel 1 power system ground Channel 1 low side output
31 32 33 34
BOOT_CH1_N VDDA1 BOOT_CH1_P OUT_CH1_P
I/O O I/O O
Bootstrap I/O pin, channel 1 power supply low side Internal power supply decoupling capacitor connection Bootstrap I/O pin, channel 1 power supply high side Channel 1 low side output
35 36
PVD1 PVD1
-
Channel 1 power system power supply Channel 1 power system power supply
No.A0989-7/12
LV4920H
Functional Descriptions
1. System Standby The built-in 5V regulator is turned on and off under control of the high/low state of the STBYB pin. When the STBYB pin is low, the regulator will be turned off, and when that pin is high, the regulator will be turned on. Also, the signal initializes the internal logic of the IC. When the STBYB pin is low, the internal logic is initialized, and when the STBYB pin is high, the IC is put into normal operation. 2. Mute Function The mute function is provided mainly to mute the output so that impulse noise will not appear in the output when the power supply is being turned on. 2.1 Output muting The PWM output signal can be turned on or off by setting the MUTEB pin high or low. When the MUTEB pin is low, the PWM output is stopped (all PWM output signals are set in the high-impedance state) and when the MUTEB pin is high, the IC is placed in normal operation mode. Also the NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin. 2.2 Power-on sequence The power-on sequence must be controlled by timing as shown below (PWM=BD mode) to minimize impulse noise. Note that when MUTE is released, all PWM input signals must be held low.
The NOD_OUTSHDNB (Nch open drain) output signal is generated (Nch open drain output is turned on) when output is shut down (except when the overcurrent protection circuit is activated). This operating condition is established when either one of the following conditions occurs: (1) Thermal shutdown circuit is activated. (2) Low power voltage protection circuit is activated. (3) MUTEB set low (all outputs muted)
No.A0989-8/12
LV4920H
2.3 Power Down Sequence The power shut-down sequence must be controlled by timing as shown below (PWM=BD mode) to minimize impulse noise.
3. Protection Circuits The LV4920H has full complement of built-in protection circuits: overcurrent protection, thermal protection, and low power supply voltage protection circuits. 3.1 Overcurrent protection circuit The overcurrent protection circuit protects the output transistors by detecting current that exceeds a predetermined value due to load shorting, shorting to power, shorting to ground, etc. When the protection circuit is activated, both the high- and low-side output transistors are turned off and the output is placed in a high-impedance state. The figure below shows the waveform of current that flows when load shorting (1) occurs.
+3.8A
-3.8A
Overcurrent hold time (approx. 20s)
No.A0989-9/12
LV4920H
3.2 Thermal protection circuit The thermal protection circuit detects the temperature (150C or higher) inside the IC and protects the IC from thermal damage. When the protection circuit is activated, both the high- and low-side output transistors are turned off, placing the output into the high-impedance state. This protective operation is given a hysteresis. Also, NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin. 3.3 Low power supply voltage protection circuit The low power supply voltage protection circuit turns off both of the high- and low-side output transistors to place the output into the high-impedance state when the power supply voltage (PVD) falls below a predetermined value (6.7V or lower). This operation (activating the protective circuit when VD rises beyond 7.5V) is given a hysteresis (0.8V or greater). Also, NOD_OUTSHDNB (Nch open drain) signal is output for an external monitor pin.
Application Circuit Example
0-5V STBY NC1 0-5V MUTE NC2 PWM_A1 NC3 PWM_B1 (BD-mode) or (AD-mode) NC4 4 8 4 9 VREG5 THERMAL 3 3 PWM_RECEIVER 4 4 5 4 6 PWM_RECEIVER 4 7 OUTPUTSTAGE CH1CONTROL DELAY 1 2
LV4920H(HSOP36)
PVD1 36 PVD1 35 1F
OUT_CH1_P 34 OUTPUTSTAGE BOOT_CH1_P CH1+ 33 VDDA1 BOOT_CH1_N OUT_CH1_N PGND1 PGND1 32 31
0.1 F 1F
22 H
0.33 F RL
0.1 F 30 29 28
0.33 F 22 H
1000 F
VD
1F
POWER SUPPLY
SEQUENCE OVER CURRENT
4 GND 10 NC5 PWM_B2 (BD-mode) or (AD-mode) NC6 4 11 4 12 PWM_RECEIVER 4 13 4 14 NC7 3-12V NOD_THERM NOD_OUTSHDN R1 R2 NC8 4 16 4 17 4 18 4 15 PWM_RECEIVER CONTROL DELAY
PGND2 PGND2 OUT_CH2_N
27 26 25 0.1 F 1F 23 22 0.1 F 21 20 19 1F 22 H 0.33 F RL 22 H 0.33 F
OUTPUTSTAGE BOOT_CH2_N CH224 VDDA2 BOOT_CH2_P OUTPUTSTAGE CH2+ OUT_CH2_P PVD2 PVD2
PWM_A2
R1,R2=Pull-Up Registor
* NOD_THERM at pin 16 and NOD_OUTSHDN at pin 17 are outputs of N-ch open-drain type. When CPU or other device monitors these outputs, it is necessary to connect pull-up resistors to a power supply for the CPU and other device. The pull-up resistors are not required if they are not to be used (not monitored).
No.A0989-10/12
LV4920H
Characteristic Data
Imute - VD
1.5
RL=8 STBY B=H , MUTEB=L
Icc - VD
50 40
RL=8 STBY B=H , MUTEB=H
Imute [mA]
Icc [mA]
1
30 20 10
0.5
0 0 2 4 6 8 10 12 14 16 18 20
0 0 2 4 6 8 10 12 14 16 18 20
VD [V]
VD [V]
VREG5 - VD
6
RL=8, STBY B=H, MUTEB=H
Power - VD
24 20
f in=1kHz THD+N=10% RL=8 2CH-Driv e AES17
VREG5 [V]
Power [W]
0 2 4 6 8 10 12 14 16 18 20
4
16 12 8 4
2
0
0 8 10 12 14 16 18 20
VD [V]
VD [V]
THD+N - Frequency
1
VD=13V RL=8 Po=1W/ch 2CH-Driv e AES17
THD+N - Frequency
1
VD=16V RL=8 Po=1W/ch 2CH-Driv e AES17
THD+N [%]
0.1
THD+N [%]
0.1
0.01 10 100 1000 10000 100000
0.01 10 100 1000 10000 100000
Frequency [Hz]
Frequency [Hz]
Frequency - Response
10 10
Frequency - Response
Response [dB]
0
Response [dB]
0
-10
VD=13V RL=8 Po=1W/ch
-10
VD=16V RL=8 Po=1W/ch
-20 10 100 1000 10000 100000
-20 10 100 1000 10000 100000
Frequency [Hz]
Frequency [Hz]
No.A0989-11/12
LV4920H
Efficiency - Power
100 80
RL=8
Efficiency - Power
100 80
RL=8
Efficiency [%]
60 40 20 0 0 2 4 6 8 10
VD=13V f in=1kHz 2CH-Driv e AES17
Efficiency [%]
60 40 20 0 0 2 4 6 8 10 12 14
VD=16V f in=1kHz 2CH-Driv e AES17
Power [W]
Power [W]
Power - THD+N
100 10 1
6.67kH
Power - THD+N
100
VD=16V, RL=8 2CH-Driv e, AES17 100Hz, 1kHz 6.67kHz, 10kHz
100Hz 6.67kH
THD+N [%]
THD+N [%]
VD=13V, RL=8 2CH-Driv e, AES17 100Hz, 1kHz 6.67kHz, 10kHz
10kHz 1kHz 10kHz
10 1 0.1
0.1 0.01 0.001
1kHz
10kHz
0.01
0.1
1
10
100
0.01 0.001
0.01
0.1
1
10
100
Power [W]
Power [W]
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of December, 2007. Specifications and information herein are subject to change without notice.
PS No.A0989-12/12

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